Noesis Technologies releases ITU G.704 E1 Framer/ Deframer IP Core
[3-November-2009]
Noesis Technologies has announced the immediate availability of its ITU G.704 compliant E1 Framer/ Deframer IP core (ntE1_G704). The IP core is designed for E1 networks and is compliant with ITU recommendations G.704, G.706, G.732, G.775 and O.163. The core provides all the necessary data-formatting transforms for transmission over an E1 carrier, one of the two most widely used TDM (time division multiplexing) carriers incorporating 32 channels, each with a bandwidth of 64kbps providing a total bit rate of 2048kbps.
The ntE1_G704 IP core provides a flexible interface supporting hardware and microprocessor modes. Specifically, the core can be connected to a host system either through an 8-bit parallel microprocessor interface (HP mode) or through a set of I/O ports (HW mode). When in HP mode, the microprocessor configures and monitors the functionality of the core through a rich set of registers. When in HW mode, the core is directly controlled and monitored through a set of dedicated ports and no microprocessor control is necessary.
At the transmit side, the framer generates framing patterns, CRC4 bits, formats outgoing and signaling data, generates alarms and clock outputs for data conditioning and decoding. At the receive side, the deframer establishes frame/ multi-frame synchronization, extracts data, signaling and alarm flags. It provides information like frame, multi-frame alignment, calculates CRC4, counts CRC4 errors and performs A-bit processing.
The ntE1_G704 core can be used in primary rate digital trunk interfaces, computer to PBX interfaces (CPI and DMI), to any high speed computer-to-computer data link and generally to any digital cross connect interface.
Availability
ntE1_G704 is available under a flexible licensing scheme as parameterizable VHDL or Verilog source code or as a fixed netlist in various FPGA target technologies.
About Noesis Technologies
Noesis Technologies is a leading provider of Forward Error Correction IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise includes Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and low-power portable.
For more information, visit the Noesis website at www.noesis-tech.com
In the press: Design-Reuse, SOCcentral, FPGA Central
News Releases
Noesis Technologies AWGN-10G High Speed Gaussian Channel Emulator Release
[15-June-2008]
Noesis Technologies announced the immediate availability of its high speed AWGN Noise Generator IP core (ntAWGN-10G). The core is fully programmable, able to support throughput rates up to 10Gbps, rendering it an ideal solution for channel emulation of high data rate applications such as GPON, G.975 and others.
License options and availability
ntAWGN-10G is available under a flexible licensing scheme as parameterizable VHDL or Verilog source code or as a fixed netlist in various FPGA target technologies.
About Noesis Technologies
Noesis Technologies is a leading provider of Forward Error Correction IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise include Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and lower-power portable.
For more information, visit the Noesis website at www.noesis-tech.com.
In the press: Design-Reuse
Noesis Technologies releases AWGN channel emulator IP
[16-January-2009]
Noesis Technologies announced the immediate availability of its standard AWGN Noise Generator IP core (ntAWGN). The core is fully programmable, able to support throughput rates up to 8Gbps, rendering it an ideal solution for channel emulation of high data rate applications.
ntAWGN is available under a flexible licensing scheme as parameterizable VHDL or Verilog source code or as a fixed netlist in various FPGA target technologies.
Please contact us at info@noesis-tech.com for further information.
About Noesis Technologies
Noesis Technologies is a leading provider of Forward Error Correction IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise includes Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and low-power portable.
For more information, visit the Noesis website at www.noesis-tech.com
In the press: Design-Reuse, SOCcentral, EDACafe
Noesis Technologies releases Fully Configurable Interleaver-Deinterleaver IP core
[12-June-2009]
Noesis Technologies announced today the immediate availability of its new version of a fully configurable Interleaver-Deinterleaver IP core (ntINT_DEINT).
The ntINT_DEINT is a fully configurable interleaver-deinterleaver compliant to a variety of industry standards such as DVB, ATSC, IEEE 802.16 e.t.c.
Main features:
• Supports Rectangular Block or Convolutional (de) interleaving.
• Rectangular Block (de) interleaver configuration:
- Block size
- Number of rows
- Number of columns
- Rows and/or columns permutations
• Convolutional (de) interleaver configuration:
- Number of branches
- Configurable branch length
• Supports continuous block data flow
• Configurable number of bits per symbol.
• Handshaking logic for I/O data flow control.
• Fully synchronous design, using single clock.
• ntINT_DEINT can also be used for replacement of existing solutions based on Xilinx's Interleaver-Deinterleaver IP core v5.1
License options and availability
ntINT_DEINT is available under a flexible licensing scheme as parameterizable VHDL or Verilog source code or as a fixed netlist in various FPGA target technologies.
About Noesis Technologies
Noesis Technologies is a leading provider of Forward Error Correction IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise include Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and lower-power portable.
For more information and detailed datasheets please email your request at info@noesis-tech.com
In the press: SOCcentral
Noesis Technologies Releases DVB-H Reed Solomon Decoder
[7-November-2007]
The ntRS-HT and ntRS-CA IP cores are highly parameterizable and can be used in a variety of applications such as IEEE 802.16a, IEEE.802.16e, DVB-S, DVB-H, ITU G.984(GPON), ITU G.975, xDSL, IESS-308, CCSDS e.t.c. The newly released ntRS-CA is especially ideal for low-power applications such DVB-H.
License options and availability
ntRS-CA is available under a flexible licensing scheme as parameterizable VHDL or Verilog source code or as a fixed netlist in various FPGA target technologies.
About Noesis Technologies
Noesis Technologies is a leading provider of Forward Error Correction IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise include Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and lower-power portable.
For more information, visit the Noesis website at www.noesis-tech.com.
In the press: Design-Reuse, BroadcastEngineering, SOCcentral
Ultra-TCS licenses Noesis Technologies FEC and Networking IP core solutions for its next-generation tactical radios
[13-February-2009]
Noesis Technologies (NOESIS), a leading telecom IP cores company, today announced that Ultra Electronics-Tactical Communication Systems (Ultra-TCS), a leading supplier of tactical Line of Sight (LOS) radio relay equipment and systems, has chosen NOESIS advanced Forward Error Correction (FEC) and Networking solutions for its next-generation tactical radios product line.
“We have purchased several IP cores under different types of licenses from Noesis Technologies.” said Phillip Sawbridge, Ultra TCS FPGA Design Specialist. “Our purchases have ranged from already developed cores to custom cores developed in conjunction with NOESIS. We have been very satisfied with the functionality, delivery time, price and performance of the cores we purchased. In addition, we highly appreciated the flexibility which NOESIS showed us in our interactions. This flexibility ranged from allowing us to try out cores before purchasing to excellent post-delivery support. NOESIS was very accommodating to revised specs as well as various small technical demands. We feel that we are building a solid partnership with NOESIS in the development of our family of next-generation tactical radios.”
Commenting on NOESIS success at ULTRA-TCS, George Krikis, CEO at NOESIS, said "We are very pleased to have enabled ULTRA-TCS to get to market quicker with its next-generation tactical radios through the rapid integration of our leading edge FEC IP and Networking solutions and we look forward to extending our cooperation further for their next phase of product developments".
About Noesis Technologies
Noesis Technologies is a privately held, fabless semiconductor company that specializes in design, development and marketing of high quality, cost effective, advanced communication IP cores and provides expert ASIC/FPGA design services in telecom area. The company’s mission is to provide a complete portfolio of telecom IP cores that will enable its customers to meet their design requirements in terms of function and performance, their expectations in terms of quality and service as well as their time to market goals. NOESIS IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and low-power portable.For more information, please visit NOESIS web site: http://www.noesis-tech.com
About Ultra Electronics-Tactical Communication Systems
Ultra Electronics-Tactical Communication Systems (TCS), located in Montreal, Canada is a leading global supplier of UHF radio relay and area communications systems. Primarily operating in the land forces environment of the military communications arena, TCS provides advanced radio products that serve as the backbone of modern tactical line-of-sight radio networks. These radio networks provide secure, battlefield high capacity data, video and trunk telephone telecommunication services to link battlefield theatre commanders and their combat forces. TCS has a long tradition of providing tactical communication solutions. For more than 30 years the Company has supported the United States, its allies and international customers with advanced, robust technologies, systems and support services. For more information, please visit ULTRA-TCS web site: http://www.ultra-tcs.com
CEM Solutions Pvt Ltd. selects Noesis Technologies L.P. Audio Codec for its new generation VoIP product
[17-November-2011]
Patras, Greece – November 17, 2011. Noesis Technologies L.P. (NOESIS), a leading provider of telecom Silicon IP Cores, has announced today that CEV Solutions Pvt Ltd., a VoIP OEM company based in India, has selected NOESIS Voice Codec IP Core solution for its next generation VoIP products line.
"We successfully integrated Noesis Technologies Audio Codec into our VoIP product in few hours and it worked perfectly. I was also impressed by the level of their technical support. Noesis has saved us months of development time and we look forward for closer cooperation with them in our future projects", said Rajneesh Verma, Product Line Manager of CEM Solutions.
Commenting on NOESIS success at CEM, George Krikis, CEO at NOESIS, said: “We are very pleased that we have enabled CEM to meet their design requirements in terms of function and performance as well as to meet their time-to-market goal through the seamless integration of our Audio codec IP Core solution. We look forward to cooperate with them in future projects.”
About Noesis Technologies L.P.
Noesis Technologies L.P., is a world-wide leading provider of production proven, process independent and parameterizable telecom IP cores, designed from the ground-up; our IP cores present an industry-leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications in the System On a Chip (SoC) era.
For more information please visit NOESIS web site: www.noesis-tech.com
About CEM Solutions Pvt Ltd.
CEM Solutions drives production of future generation products related to voice and video over IP technologies. The company’s mission is to lead the world towards future telecommunication products and it is currently doing its R & D at Bangalore on different VoIP products for Residential users, SMB units and large multi national corporations. CEM has product lines on software and hardware whether it is voice, video, triple play, future broadcast over IP technologies.
For more information please visit CEM web site: www.cem-solutions.net
In the press: Design-Reuse
Noesis Technologies L.P. becomes a full member of Hellenic Semiconductor Industry Association
[1-December-2011]
Patras, Greece – December 1, 2011. Noesis Technologies L.P. (NOESIS), a leading provider of telecom Silicon IP Cores, has announced today that has been admitted as a full member of Hellenic Semiconductor Industry Association (HSIA) during HSIA’s General Assembly held on November 25th.
“We are excited to have Noesis join Hellenic Semiconductor Industry Association as a full member and partner in reaching our vision of establishing the Greek Microelectronics Industry as a dynamic player of the global high-tech market”, said Mr Yorgos Koutsoyannopoulos, Chairman at HSIA.
Commenting on NOESIS admittance in HSIA, George Krikis, CEO at NOESIS, said: “We are very pleased and honored to join HSIA’s ecosystem. Being a full HSIA member is a clear recognition of the quality of our products and services”.
About Noesis Technologies L.P.
Noesis Technologies L.P., is a world-wide leading provider of production proven, process independent and parameterizable telecom IP cores, designed from the ground-up; our IP cores present an industry-leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications in the System On a Chip (SoC) era.
For more information please visit NOESIS web site: www.noesis-tech.com
About Hellenic Semiconductor Industry Association.
The Hellenic Semiconductor Industry Association (HSIA) was launched in 2005 as a non-profit association of high tech industries to represent the dynamic Greek sector of semiconductors, micro- & nano- electronics and embedded systems. HSIA brings together 50 industrial members and over 30 relevant universities and institutes in Greece and abroad. HSIA is a proud member of the European Semiconductor Industry Association (ESIA) and the Global Semiconductor Alliance (GSA).
For more information please visit CEM web site: www.hsia.gr
In the press: Design-Reuse
Noesis Technologies L.P. exhibits at ChipEx2012 conference & exhibition
Noesis Technologies will exhibit its portfolio of hardware acceleration silicon IP core solutions as well as the first release of ComLab© the innovative integrated communications development platform at ChipEx 2012, May 1-2th, Tel-Aviv, Israel. You are welcome to visit our Booth.
ChipEx2012 is the leading international event of the Israeli microelectronics industry. The conference will take place on May 1-2, 2012 at the Hilton Convention Center in Tel Aviv, Israel. This year's event theme is “Next Generation Technologies” and it's produced by TapeOut Magazine and Chiportal in cooperation with The Israel Export and International Cooperation Institute and Gary Smith EDA- The leading research company in the global semiconductor industry. The goal of the conference is to update the Israeli microelectronics industry with the latest technological innovations and the future directions of the industry. ChipEx2012 target audience are all people involved with the microelectronics industry including engineers, R&D managers, senior executives, CEOs of fabless microelectronics companies, multinational design centers, consultants, experts, venture capital managers involved with the microelectronics industry as well as electrical/electronics/computers students & professors from the various universities around Israel.
Noesis Technologies L.P. first Greek company to achieve Xilinx Alliance Membership
[18-June-2012]
Patras, Greece – June 18, 2012. Noesis Technologies, L.P. a world-wide leading provider of high quality telecom IP Cores, based in Patras, Greece, announces that it has been accepted as a member of the Xilinx Alliance Program, a worldwide ecosystem of qualified companies collaborating with Xilinx to help customers develop products faster and with confidence on Targeted Design Platforms. Xilinx, Inc. is the world market leader of programmable logic solutions and has built this ecosystem to meet customer needs, while at the same time staying committed to its long-term success. Comprised of FPGA IP providers, EDA vendors, embedded software providers, system integrators, and hardware suppliers, Alliance members help accelerate the design process while minimizing risk.
"Xilinx welcomes Noesis Technologies to the Xilinx Alliance Program. Through this partnership, Noesis will provide Xilinx customers with top notch quality telecom IP core solutions that are highly optimized for Xilinx FPGAs, in the areas of forward error correction, security, audio compression and networking." said Sr. Manager of Xilinx Partner Ecosystems and Alliances, David Vornholt.
“We are excited and honored to partner with the leading supplier of high performance programmable semiconductor devices by joining the Xilinx Alliance Program worldwide ecosystem. Our participation is a clear recognition of the top quality of our IP products optimized for Xilinx technology” states George Krikis, Managing Director of Noesis Technologies.
About Noesis Technologies L.P. (www.noesis-tech.com)
Noesis Technologies, L.P. is a silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms. Our hardware accelerator IP solutions allow telecom system developers to significantly off load demanding tasks from the CPU and to drastically decrease execution time thus boosting the overall system performance. Our IP cores present an industry leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications. Noesis offers a complete portfolio of Forward Error Correction IP core solutions that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product and Turbo Convolutional Codecs, BCH codecs, (De)Interleavers, Channel Emulators. The company additionally offers a range of cores in the areas of security, networking, audio/voice compression and telecom DSP. Our solutions have been integrated in our customers’ end-products in telecom, aerospace and defense systems. Noesis Technologies is headquartered at Patras Science Park, GR 26504 Patras, Greece and has offices at San Jose, CA 95134, USA. For more information please visit www.noesis-tech.com
About Xilinx, Inc. (www.xilinx.com)
Xilinx is the world’s leading provider of All Programmable technologies and devices, beyond hardware to software, digital to analog, and single to multiple die in 3D ICs. These industry leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information please visit www.xilinx.com
Noesis Technologies announces ComLab™ platform, a new paradigm towards communication systems hardware emulation
[22-March-2013]
Patras, Greece – March 22, 2013: Noesis Technologies, L.P. announced today the immediate availability of ComLab™, a cost efficient highly integrated development environment (IDE) that enables a system designer to rapidly build, configure and evaluate in real-time the performance of complex telecommunication systems. It is comprised of a Xilinx FPGA based board for the real-time HW emulation, a sophisticated application SW with interactive GUI capabilities for configuration, control and monitoring purposes as well as a rich portfolio of highly optimized telecom subsystem silicon IPs. ComLab™ platform is ideal for proof-of-concept rapid prototyping as well as an intuitive educational tool for engineers.
Applications
ComLab™ platform can be used in a variety of applications, including:
► Fast and efficient modeling and development of complex telecom systems.
► Proof-of-concept rapid prototyping.
► In-circuit emulation.
► R&D telecom engineers training.
► Educational tool for universities.
► Low-volume production.
For more information please download ComLab™ platform product brief at http://www.noesis-tech.com/files/ntCOMLAB_pb.pdf
About Noesis Technologies L.P. (www.noesis-tech.com)
Noesis Technologies, L.P. is a silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms. Our hardware accelerator IP solutions allow telecom system developers to significantly off load demanding tasks from the CPU and to drastically decrease execution time thus boosting the overall system performance. Our IP cores present an industry leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications. Noesis offers a complete portfolio of Forward Error Correction IP core solutions that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product and Turbo Convolutional Codecs, BCH codecs, (De)Interleavers, Channel Emulators. The company additionally offers a range of cores in the areas of security, networking, audio/voice compression and telecom DSP. Our solutions have been integrated in our customers’ end-products in telecom, aerospace and defense systems. Noesis Technologies is headquartered at Patras Science Park, GR 26504 Patras, Greece and has offices at San Jose, CA 95134, USA. For more information please visit www.noesis-tech.com
Noesis Technologies appoints Avant Technology Inc. its representative for China, Taiwan, Japan, Korea, Malaysia and Singapore
[1-September-2014]
Patras, Greece – September 1, 2014: Noesis Technologies, P.C. is pleased to announce that has appointed Avant Technology Inc. as its representative for China, Taiwan, Japan, Korea, Malaysia and Sinapore.
“We are very excited and honored to cooperate with Avant Technology Inc. for the representation of Noesis Technologies high performance silicon IP solutions in Asian high technology market. We believe that combining Avant’s in-depth knowledge in Asian IP market with Noesis Technologies top-notch quality telecom IP core solutions will significantly increase our business in this region of the world.” said Mr George Krikis, Managing Director of Noesis Technologies.
About Noesis Technologies P.C. (www.noesis-tech.com)
Noesis Technologies, P.C. is a silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms. Our hardware accelerator IP solutions allow telecom system developers to significantly off load demanding tasks from the CPU and to drastically decrease execution time thus boosting the overall system performance. Our IP cores present an industry leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications. Noesis offers a complete portfolio of Forward Error Correction IP core solutions that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product and Turbo Convolutional Codecs, LDPC Codecs, BCH codecs, (De)Interleavers, Channel Emulators. The company additionally offers a range of cores in the areas of security, networking, audio/voice compression and telecom DSP. Our solutions have been integrated in our customers’ end-products in telecom, aerospace and defense systems. Noesis Technologies is headquartered at Patras Science Park, GR 26504 Patras, Greece and has offices at San Jose, CA 95134, USA. For more information please visit www.noesis-tech.com
About Avant Technology Inc. ( www.avant-tek.com)
Avant Technology Inc. is a professional CAD/EDA tool & Silicon IP distributor in Asia. Avant provides leading-edge CAD tools such as ESL Hardware/Software Partition & High-level Synthesis, RTL-to-RTL Editing & Verification Platform, RTL Testability Analysis & Debug, Validation of Cell Library Integrity, IP Validation, Cell Library Creation Platform, IBIS Model Generation & Validation, Ultra High Performance Layout Data Browser, Layout Format Translator and Integrated MEMS Design Environment. For more information, please visit www.avant-tek.com
Noesis Technologies becomes a full member of Si-Cluster
[24-June-2015]
Patras, Greece – June 24, 2015: Noesis Technologies, P.C. is pleased to announce that has jointed as a full member at the Greek Space Technologies and Applications Cluster.
“Noesis Technologies participation at si-cluster indicates our firm belief in strengthening collaborative culture in Greece between high- tech companies. Noesis has the necessary expertise in order to participate actively, together with other members of si-cluster, the business extroversion effort in the aerospace sector.” said Mr George Krikis, Managing Director of Noesis Technologies.
About Noesis Technologies P.C. (www.noesis-tech.com)
Noesis Technologies, P.C. is a silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms. Our hardware accelerator IP solutions allow telecom system developers to significantly off load demanding tasks from the CPU and to drastically decrease execution time thus boosting the overall system performance. Our IP cores present an industry leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications. Noesis offers a complete portfolio of Forward Error Correction IP core solutions that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product and Turbo Convolutional Codecs, LDPC Codecs, BCH codecs, (De)Interleavers, Channel Emulators. The company additionally offers a range of cores in the areas of security, networking, audio/voice compression and telecom DSP. Our solutions have been integrated in our customers’ end-products in telecom, aerospace and defense systems. Noesis Technologies is headquartered at Patras Science Park, GR 26504 Patras, Greece and has offices at San Jose, CA 95134, USA. For more information please visit www.noesis-tech.com
About Si-Cluster ( www.si-cluster.gr)
The si-Cluster (Space Technologies and Applications Cluster) is an emerging, industry-led and user-driven innovation cluster in Greece, with a sizeable potential to compete worldwide in the challenging and fast-growing sector of space technologies and applications. Currently, the si-Cluster consists of more than 20 industrial members -including both large businesses and SMEs- while it is rapidly expanding not only its industrial base but also its cooperation ties with all the innovation ecosystem actors, including academia, research institutes, European, regional and central governmental and other stakeholders involved in this highly demanding technological field. For more information please visit www.si-cluster.gr
In the press : Corallia
Noesis Technologies exhibits at IAC2015, Oct 12-16th, Jerusalem, Isreal
[20-October-2015]
Patras, Greece – October 20, 2015:
Noesis Technologies has successfully participated at Ιnternational Astronautics Congress 2015 (IAC 2015) at Jerusalem October 12-16 2015. The IAC is the one place and time of the year when all space actors come together. Global, multidisciplinary and covering all space sectors and topics, it offers everyone the latest space information, developments but above all contacts and potential partnerships. IAC visitors had the chance to see Noesis Technologies latest IP Core additions including its high performance Turbo Product Codec for deep space communications.
About Noesis Technologies P.C. (www.noesis-tech.com)
Noesis Technologies, P.C. is a silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms. Our hardware accelerator IP solutions allow telecom system developers to significantly off load demanding tasks from the CPU and to drastically decrease execution time thus boosting the overall system performance. Our IP cores present an industry leading combination of high performance, low power and low die-area, as well as easy customization for adaptability to a wide range of applications. Noesis offers a complete portfolio of Forward Error Correction IP core solutions that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product and Turbo Convolutional Codecs, LDPC Codecs, BCH codecs, (De)Interleavers, Channel Emulators. The company additionally offers a range of cores in the areas of security, networking, audio/voice compression and telecom DSP. Our solutions have been integrated in our customers’ end-products in telecom, aerospace and defense systems. Noesis Technologies is headquartered at Patras Science Park, GR 26504 Patras, Greece and has offices at San Jose, CA 95134, USA. For more information please visit www.noesis-tech.com
About IAC2015 (www.iac2015.org)
The IAC is the one place and time of the year when all space actors come together. Global, multidisciplinary and covering all space sectors and topics, it offers everyone the latest space information, developments but above all contacts and potential partnerships. Each year, the IAC changes country, theme and local organizer, enabling all to learn more about, and be a part of the world space scene. The IAC is the platform by which over 40 administrative and technical committees support the Federation in its mission to advance knowledge about space and to foster the development of space assets by facilitating global cooperation. At its annual International Astronautical Congress (IAC) and other thematic conferences, the IAF brings its multidisciplinary and international network to life. For more information please visit www.iac2015.org